SH7708 Datasheet, PDF (520/633 Pages) Renesas Technology Corp – SuperH™ RISC engine

Stable input clock
EXTAL input
or CKIO
input
PLL synchronization
PLL output,
CKIO output
Internal clock
Reset or NMI interrupt request
Stable input clock
t_PLL
PLL synchronization
STATUS 0
STATUS 1
Normal
Standby
Normal
Note: PLL oscillation settling time when clock is input from EXTAL pin or CKIO pin
Figure 17.8 PLL Synchronization Settling Time in Case of Reset or NMI Interrupt
Stable input clock
EXTAL input
or CKIO input
PLL synchronization
PLL output,
CKIO output
IRL (3–0) interrupt request
Stable input clock
t_IRLSTB
t_PLL
PLL synchronization
Internal clock
STATUS 0
STATUS 1
Normal
Standby
Normal
Note: PLL oscillation settling time when clock is input from EXTAL pin or CKIO pin
Figure 17.9 PLL Synchronization Settling Time in Case of IRL Interrupt
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