 English |
|
|
|
|
|
|
|
| SH7708 Datasheet, PDF (486/633 Pages) Renesas Technology Corp – SuperH™ RISC engine | |||
| |||
| ◁ |
16.3.7 Synchronous DRAM Timing
CKIO
A25âA16
A12 or A10
A15âA0
CSn
RD/WR
RAS
CAS
DQMxx
D31âD0
BS
Tr
Tc1
Tc2
(Tpc)
tAD
tAD
Row address
tAD
tAD
tAD
Row
Read A
address command
tAD
tAD
Row
address
tCSD1
Column address
tAD
tCSD1
tRWD
tRASD2
tRASD2
tRWD
tDQMD
tCASD2
tCASD2
tDQMD
tRDS2 tRDH2
tBSD
tBSD
CKE
(High)
Figure 16.34 Synchronous DRAM Read Bus Cycle (RCD = 0, CAS Latency = 1, TPC = 0)
468
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese