SH7708 Datasheet, PDF (348/633 Pages) Renesas Technology Corp – SuperH™ RISC engine

12.2.14 Month Alarm Register (RMONAR)
The month alarm register (RMONAR) is an 8-bit read/write register, and an alarm register
corresponding to the BCD-coded month section counter RMONCNT of the RTC. When the ENB
bit is set to 1, a comparison with the RMONCNT value is performed. From among the registers
RSECAR, RMINAR, RHRAR, RWKAR, RDAYAR, RMONAR, the counter and alarm register
comparison is performed only on those with ENB bits set to 1, and if each of those coincide, an
RTC alarm interrupt is generated.
The range that can be set is 01–12 (decimal) + ENB bit. Errant operation will result if any other
value is set.
The ENB bit in RMONAR is initialized by a power-on reset. The remaining RMONAR fields are
not initialized by a power-on reset or manual reset, or in standby mode. Contents are retained in a
manual reset and in standby mode.
Bit: 7
6
Bit name: ENB
—
Initial value: 0
0
R/W: R/W
R
5
4
3
2
1
0
—
10
months
1 month
0
—
—
—
—
—
R
R/W R/W R/W R/W R/W
12.2.15 RTC Control Register 1 (RCR1)
The RTC control register 1 (RCR1) is an 8-bit read/write register that affects carry flags and alarm
flags. It also selects whether to generate interrupts for each flag. Because flags are sometimes set
after an operand read, do not use this register in read-modify-write processing.
RCR1 is initialized to H'00 by a power-on reset. In a manual reset, all bits are initialized to 0
except for the CF flag, which is undefined. When using the CF flag, it must be initialized
beforehand. This register is not initialized in standby mode.
Bit: 7
6
Bit name: CF
—
Initial value: 0
0
R/W: R/W
R
5
4
3
2
—
CIE
AIE
—
0
0
0
0
R
R/W R/W
R
1
0
—
AF
0
0
R
R/W
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