SH7708 Datasheet, PDF (431/633 Pages) Renesas Technology Corp – SuperH™ RISC engine

Initialize
Clear TE and RE bits in SCSCR to 0 (1)
Clear SCSSR’s FER/ERS,
(2)
PER and ORER flags to 0
Set SCSCMR’s O/E bit to parity
and set CKS1 and CKS0 bits to ⁽³⁾
the clock
Set SCSCMR's SMIF, SDIR,
(4)
and SINV bits
Set value in SCBRR
(5)
Set SCSCR’s CKE1 and CKE0 bits
to the clock and clear TIE, RIE, (6)
TE, RE, MPIE, and TEIE bits to 0
Wait
Has a 1-bit
interval elapsed?
Yes
Set SCSCR’s
TIE, RIE, TE, and RE bits
No
(7)
End
Figure 14.5 Initialization Flowchart (Example)
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