SH7708 Datasheet, PDF (243/633 Pages) Renesas Technology Corp – SuperH™ RISC engine

Table 10.8 8-Bit External Device/Big Endian Access and Data Alignment
Data Bus
Strobe Signal
Operation
D31– D23– D15–
D24 D16 D8 D7–D0
WE3, WE2, WE1, WE0,
CASHH, CASHL, CASLH, CASLL,
DQMUU DQMUL DQMLU DQMLL
Address 0 byte
— — — Data 7–0 —
—
—
Asserted
access
Address 1 byte
— — — Data 7–0 —
—
—
Asserted
access
Address 2 byte
— — — Data 7–0 —
—
—
Asserted
access
Address 3 byte
— — — Data 7–0 —
—
—
Asserted
access
Address 0 1st time — — — Data
—
—
—
Asserted
word
(address
15–8
access 0)
2nd time — — — Data 7–0 —
—
—
Asserted
(address
1)
Address 2 1st time — — — Data
—
—
—
Asserted
word
(address
15–8
access 2)
2nd time — — — Data 7–0 —
—
—
Asserted
(address
3)
Address 0 1st time — — — Data
—
—
—
Asserted
longword (address
31–24
access 0)
2nd time — — — Data
—
—
—
Asserted
(address
23–16
1)
3rd time — — — Data
—
—
—
Asserted
(address
15–8
2)
4th time — — — Data 7–0 —
—
—
Asserted
(address
3)
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