SH7708 Datasheet, PDF (165/633 Pages) Renesas Technology Corp – SuperH™ RISC engine

Canceling with a Reset: Standby mode can be canceled with a reset (power-on or manual). Keep
the RESET pin low until the clock oscillation settles. The internal clock will continue to be output
to the CKIO pin.
8.4.3 Clock Pause Function
In standby mode, the clock input from the EXTAL pin or CKIO pin can be halted and the
frequency can be changed. This function is used as follows:
1. Enter standby mode using the appropriate procedures.
2. Once standby mode is entered and the clock stopped within the chip, the STATUS1 pin output
is low and the STATUS0 pin output is high.
3. Once the STATUS1 pin goes low and the STATUS0 pin goes high, the input clock is stopped
or the frequency is changed.
4. When the frequency is changed, an NMI or IRL interrupt is input after the change. When the
clock is stopped, the same interrupts are input after the clock is applied.
5. After the time set in the WDT has elapsed, the clock starts being applied internally within the
chip, the STATUS1–STATUS0 pins both go low, interrupts are handled, and operation
resumes.
8.5 Module Standby Function
8.5.1 Transition to Module Standby Function
Setting the standby control register MSTP2–MSTP0 bits to 1 halts the supply of clocks to the
corresponding on-chip supporting modules. This function can be used to reduce the power
consumption in sleep mode. The module standby function holds the status prior to halt of the
external pins of the on-chip supporting modules. TMU external pins hold their status prior to the
halt. SCI external pins go to the reset state. With a few exceptions, all registers hold their values.
Bit
Value Description
MSTP2 0
TMU runs.
1
Supply of clock to TMU is halted. Registers are initialized.^*1
MSTP1 0
RTC runs.
1
Supply of clock to RTC is halted. Register access is prohibited.^*2
MSTP0 0
SCI operates.
1
Supply of clock to SCI is halted.
Notes: 1. The registers initialized are the same as in standby mode (table 8.4).
2. The counter runs.
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