SH7708 Datasheet, PDF (427/633 Pages) Renesas Technology Corp – SuperH™ RISC engine

(Z) A Z Z A Z Z Z A A Z (Z) State
Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp
a. Direct convention (SDIR, SINV, and O/E are all 0)
(Z) A Z Z A A A A A A Z (Z) State
Ds D7 D6 D5 D4 D3 D2 D1 D0 Dp
b. Inverse convention (SDIR, SINV, and O/E are all 1)
Figure 14.4 Waveform of Start Character
14.3.5 Clock
Only the internal clock generated by the on-chip baud rate generator can be used as the
communication clock in the smart card interface. The bit rate for the clock is set by the bit rate
register (SCBRR) and the CKS1 and CKS0 bits in the serial mode register (SCSMR), and is
calculated using the equation below. Table 14.5 shows sample bit rates. If clock output is then
selected by setting CKE0 to 1, a clock with a frequency 372 times the bit rate is output from the
SCK0 pin.
B
=
1488
×
Pφ
2^2n–1
×
(N
+
1)
×
10⁶
Where:
N = Value set in SCBRR (0 ≤ N ≤ 255)
B = Bit rate (bit/s)
Pφ = Peripheral module operating frequency (MHz)*
n = 0–3 (table 14.4)
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