SH7708 Datasheet, PDF (320/633 Pages) Renesas Technology Corp – SuperH™ RISC engine

Pφ
TCLK
RTCCLK
TUNI0
Prescaler
Clock
controller
Ch. 0
Counter
controller
Interrupt
controller
Ch. 1
Counter
controller
Bus interface
TOCR
TSTR
TCR0
TCNT0
TCOR0
TCR1
TCNT1
TUNI1
Interrupt
controller
Ch. 2
Counter
controller
TCOR1
TCR2
TCPR2
TCNT2
TUNI2
TICPI2
TOCR: Timer output control register
TSTR: Timer start register
TCR: Timer control register
Interrupt
controller
TCOR2
TMU
TCNT: 32-bit timer counter
TCOR: 32-bit timer constant register
TCPR2: 32-bit input capture register
Figure 11.1 TMU Block Diagram
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