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| SH7708 Datasheet, PDF (488/633 Pages) Renesas Technology Corp – SuperH™ RISC engine | |||
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Tr
Tc1 Tc2/Td1 Tc3/Td2 Tc4/Td3 Td4
(Tpc) (Tpc)
CKIO
A25âA16
A12
or A10
A15âA0
CSn
RD/WR
RAS
CAS
DQMxx
D31âD0
BS
tAD
Row address
tAD
tAD
tAD
tAD
Row
address
tAD
tAD
Read command
Read A
command
tAD
Row
address
tCSD1
Column address (1â4)
tAD
tCSD1
tRWD
tRWD
tRASD2 tRASD2
tCASD2
tDQMD
tCASD2
tDQMD
tRDS2 tRDH2
tBSD
tRDS2 tRDH2
tBSD
CKE
(High)
Figure 16.36 Synchronous DRAM Read Bus Cycle (Burst Read (Single Read à 4), RCD = 0,
CAS Latency = 1, TPC = 1)
470
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