SH7708 Datasheet, PDF (221/633 Pages) Renesas Technology Corp – SuperH™ RISC engine

Bit 0—Area 6 Bus Type (A6PCM): Designates whether to access physical space area 6 as
PCMCIA space.
Bit 0: A6PCM
Description
0
Access physical space area 6 as normal memory.
1
Access physical space area 6 as PCMCIA space.*
Note: MD4 pin output is CE2B.
(Initial value)
10.2.2 Bus Control Register 2 (BCR2)
Bus control register 2 (BCR2) is a 16-bit read/write register that selects the bus size of each area,
and whether to use the 8-bit port. It is initialized to H'3FFC by a power-on reset, but is not
initialized by a manual reset or in standby mode. Do not access external memory outside area 0
until BCR2 register initialization is complete.
Bit: 15
Bit name: —
Initial value: 0
R/W: R
14
13
12
11
10
9
8
— A6SZ1 A6SZ0 A5SZ1 A5SZ0 A4SZ1 A4SZ0
0
1
1
1
1
1
1
R
R/W R/W R/W R/W R/W R/W
Bit:
Bit name:
Initial value:
R/W:
7
A3SZ1
1
R/W
6
A3SZ0
1
R/W
5
A2SZ1
1
R/W
4
A2SZ0
1
R/W
3
A1SZ1
1
R/W
2
A1SZ0
1
R/W
1
0
— PORTEN
0
0
—
R/W
Bits 15, 14, and 1—Reserved: These bits always read 0. The write value should always be 0.
Bits 2n + 1, 2n—Area n (1–6) Bus Size Specification (AnSZ1, AnSZ0): These bits specify the bus
sizes of physical space area n (n = 1 to 6).
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