SH7708 Datasheet, PDF (166/633 Pages) Renesas Technology Corp – SuperH™ RISC engine

8.5.2 Clearing the Module Standby Function
The module standby function can be cleared by clearing the MSTP2–MSTP0 bits to 0, or by a
power-on reset or manual reset.
8.6 Timing of STATUS Pin Changes
The timing of STATUS1 and STATUS0 pin changes is shown in figures 8.1 through 8.9.
The meaning of the STATUS descriptions is as follows:
Reset: HH (STATUS1 high, STATUS0 high)
Sleep: HL (STATUS1 high, STATUS0 low)
Standby: LH (STATUS1 low, STATUS0 high)
Normal: LL (STATUS1 low, STATUS0 low)
The meaning of the clock units is as follows:
Bcyc: Bus clock cycle
Pcyc: Peripheral clock cycle
8.6.1 Timing for Resets
Power-On Reset (Clock Modes 0, 1, 2, and 7):
CKIO
RESET
PLL settling
time
STATUS
Normal
Reset
Normal
0 to 5 Bcyc
0 to 30 Bcyc
Figure 8.1 Power-On Reset (Clock Mode 0, 1, 2, and 7) STATUS Output
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