SED1354 Datasheet, PDF (94/472 Pages) Epson Company – Color Graphics LCD/CRT Controller

Page 86
7.4.13 CRT Timing
Example Timing for 640x480 CRT
VRTC
HRTC
DACP[7:0] ^LINE480
BLANK#
VNDP
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Vancouver Design Center
VDP
LINE1
LINE480
HRTC
DACCLK
BLANK#
DACD[7:0]
HNDP₁
HDP
HNDP₂
1-1
1-2
1-640
VDP
VNDP
HDP
HNDP
= Vertical Display Period
= Vertical Non-Display Period
= Horizontal Display Period
= Horizontal Non-Display Period
Figure 7-39: CRT Timing
= (REG[09h] bits [1:0], REG[08h] bits [7:0]) + 1
= (REG[0Ah] bits [5:0]) + 1
= ((REG[04h] bits [6:0]) + 1)*8Ts
= HNDP₁ + HNDP₂ = ((REG[05h] bits [4:0]) + 1)*8Ts
SED1354
X19A-A-002-16
Hardware Functional Specification
Issue Date: 99/05/18