SED1354 Datasheet, PDF (467/472 Pages) Epson Company – Color Graphics LCD/CRT Controller

Epson Research and Development
Vancouver Design Center
Page 19
5.4 Memory Mapping and Aliasing
When the TX3912 accesses the PC Card slots without the ITE IT8368E, its system memory
is mapped as in Table , “”.
Note
Bits CARD1IOEN and CARD2IOEN need to be set in the TX3912 Memory
Configuration Register 3.
Table 5-1: TX3912 to Unbuffered PC Card Slots System Address Mapping
TX3912 Address
0800 0000h
0C00 0000h
6400 0000h
6400 0000h
Size
64Mb
64Mb
64Mb
64Mb
Function
(CARDnIOEN=0)
Card 1 Attribute
Card 2 Attribute
Card 1 Memory
Card 2 Memory
Function
(CARDnIOEN=1)
Card 1 IO
Card 2 IO
When the TX3912 accesses the PC Card slots buffered through the ITE IT8368E, bits
CARD1IOEN and CARD2IOEN are ignored and the attribute/IO space of the TX3912 is
divided into Attribute, IO and SED1354 access. Table 5-2:, “TX3912 to PC Card Slots
Address Remapping using the IT8368E” provides all the details of the Attribute/IO address
re-allocation by the IT8368E.
Table 5-2: TX3912 to PC Card Slots Address Remapping using the IT8368E
IT8368E Uses PC Card Slot #
1
2
TX3912 Address Size
0800 0000h
16M byte
0900 0000h
8M byte
0980 0000h
0A00 0000h
6400 0000h
0C00 0000h
0D00 0000h
8M byte
32M byte
64M byte
16M byte
8M byte
0D80 0000h
0E00 0000h
6800 0000h
8M byte
32M byte
64M byte
Function
Card 1 IO
SED1354 registers,
aliased 131,072 times at 64 byte intervals
SED1354 display buffer,
aliased 4 times at 2Mb intervals
Card 1 Attribute
Card 1 Memory
Card 2 IO
SED1354 registers,
aliased 131,072 times at 64 byte intervals
SED1354 display buffer,
aliased 4 times at 2Mb intervals
Card 2 Attribute
Card 2 Memory
Interfacing to the Toshiba MIPS TX3912 Processor
Issue Date: 99/03/10
SED1354
X19A-G-012-03