SED1354 Datasheet, PDF (426/472 Pages) Epson Company – Color Graphics LCD/CRT Controller

Page 20
Epson Research and Development
Vancouver Design Center
4.6 Test Software
The test software used to exercise this interface is very simple. It carries out the following
functions:
1. Configures chip select 4 on the MPC821 to map the SED1354 to an unused 4M byte
block of address space.
2. Loads the appropriate values into the option register for CS4.
3. Enables the SED1354 host bus interface by writing the value 0 to REG[1Bh].
At that point the software runs in a tight loop which reads the SED1354 Revision Code
Register REG[00h]. This allows monitoring of the bus timing on a logic analyzer.
This source code for the following test routine was entered into the memory of the
MPC821ADS using the line-by-line assembler in MPC8BUG (the debugger provided with
the ADS board). It was run on the ADS and a logic analyzer was used to verify operation
of the interface hardware.
4.6.1 Source Code
BR4
equ
OR4
equ
MemStart
equ
DisableReg
equ
RevCodeReg
equ
Start
mfspr
andis.
andis.
oris
ori
stw
andis.
oris
ori
Loop
stw
andis.
oris
stb
lbz
b
end
$120
$124
$40
$1b
0
; CS4 base register
; CS4 option register
; upper word of SED1354 start address
; address of SED1354 Disable Register
; address of Revision Code Register
r1,IMMR
; get base address of internal registers
r1,r1,$ffff
; clear lower 16 bits to 0
r2,r0,0
; clear r2
r2,r2,MemStart ; write base address
r2,r2,$0801
; port size 16 bits; select GPCM; enable
r2,BR4(r1)
; write value to base register
r2,r0,0
; clear r2
r2,r2,$ffc0
; address mask – use upper 10 bits
r2,r2,$0708
; normal CS negation; delay CS ½ clock;
; inhibit burst
r2,OR4(r1)
; write to option register
r1,r0,0
; clear r1
r1,r1,MemStart ; point r1 to start of SED1354 mem space
r1,DisableReg(r1) ; write 0 to disable register
r0,RevCodeReg(r1) ; read revision code into r1
Loop
; branch forever
SED1354
X19A-G-010-04
Interfacing to the Motorola MPC821 Microprocessor
Issue Date: 99/03/10