SED1354 Datasheet, PDF (197/472 Pages) Epson Company – Color Graphics LCD/CRT Controller

Epson Research and Development
Vancouver Design Center
/*
** Step 2: Disable the display FIFO
*/
*(pRegs + 0x23) = 0x80;
/*
** Step 3: Set the memory type
**
** Register 1: Memory Configuration - 4 ms refresh, EDO
*/
*(pRegs + 0x01) = 0x30;
/* 0011 0000 */
/*
** Step 4: Set the performance register
**
** Register 22: Performance Enhancement -
*/
*(pRegs + 0x22) = 0x24;
/* 0010 0100 */
/*
** Step 5: Set dual/single panel
**
** Register 2: Panel Type - 8-bit, format 2, color, single, passive.
*/
*(pRegs + 0x02) = 0x1C;
/* 0001 1100 */
/*
** Step 6: Set the rest of the registers in order.
*/
/*
** Register 3: Mod Rate -
*/
*(pRegs + 0x03) = 0x00;
/* 0000 0000 */
/*
** Register 4: Horizontal Display Width (HDP) - 320 pixels
**
(320 / 8) - 1 = 39t = 27h
*/
*(pRegs + 0x04) = 0x27;
/* 0010 0111 */
/*
** Register 5: Horizontal Non-Display Period (HNDP)
**
PCLK
**
Frame Rate = -----------------------------
**
(HDP + HNDP) * (VDP + VNDP)
**
**
8,250,000
**
= -----------------------------
**
(320 + HNDP) * (240 + VNDP)
**
** HNDP and VNDP must be calculated such that the desired frame rate
** is achieved.
*/
*(pRegs + 0x05) = 0x0F;
/* 0000 1111 */
/*
Page 57
Programming Notes and Examples
Issue Date: 98/10/28
SED1354
X19A-G-002-06