SED1354 Datasheet, PDF (124/472 Pages) Epson Company – Color Graphics LCD/CRT Controller

Page 116
10 Display Configuration
10.1 Display Mode Data Format
Epson Research and Development
Vancouver Design Center
1-bpp:
Byte 0
Host Address
2-bpp:
Byte 0
Byte 1
Host Address
4-bpp:
Byte 0
Byte 1
Byte 2
Host Address
8-bpp:
Byte 0
Byte 1
Byte 2
Host Address
bit 7
bit 0
A₀ A₁ A₂ A₃ A₄ A₅ A₆ A₇
Display Buffer
bit 7
bit 0
A₀ B₀ A₁ B₁ A₂ B₂ A₃ B₃
A₄ B₄ A₅ B₅ A₆ B₆ A₇ B₇
Display Buffer
bit 7
bit 0
A₀ B₀ C₀ D₀ A₁ B₁ C₁ D₁
A₂ B₂ C₂ D₂ A₃ B₃ C₃ D₃
A₄ B₄ C₄ D₄ A₅ B₅ C₅ D₅
Display Buffer
3-3-2 RGB
bit 7
bit 0
R₀₂ R₀₁ R₀₀ G₀₂ G₀₁ G₀₀ ^B01 B₀₀
R₁₂ R₁₁ R₁₀ G₁₂ G₁₁ G₁₀ ^B11 B₁₀
R₂₂ R₂₁ R₂₀ G₂₂ G₂₁ G₂₀ ^B21 B₂₀
Display Buffer
P₀P₁P₂ P₃ P₄ P₅ P₆ P₇
P_n = (A_n)
Panel Display
P₀P₁P₂ P₃ P₄ P₅ P₆ P₇
P_n = (A_n, B_n)
Panel Display
P₀P₁P₂ P₃ P₄ P₅ P₆ P₇
P_n = (A_n, B_n, C_n, D_n)
Panel Display
P₀P₁P₂ P₃ P₄ P₅ P₆ P₇
P_n = (R_n2-0, G_n ^2-0, B_n1-0)
Panel Display
Figure 10-1: 1/2/4/8 Bit-Per-Pixel Format Memory Organization
SED1354
X19A-A-002-16
Hardware Functional Specification
Issue Date: 99/05/18