SED1354 Datasheet, PDF (427/472 Pages) Epson Company – Color Graphics LCD/CRT Controller

Epson Research and Development
Vancouver Design Center
Page 21
Note
MPC8BUG does not support comments or symbolic equates; these have been added for
clarity.
Note
It is important to note that when the MPC821 comes out of reset, its on-chip caches and
MMU are disabled. If the data cache is enabled, the MMU must be setup so the
SED1354 memory block is tagged as non-cacheable. This ensures that accesses to the
SED1354 will occur in proper order, and the MPC821 will not attempt to cache any data
read from or written to the SED1354 or its display buffer.
Interfacing to the Motorola MPC821 Microprocessor
Issue Date: 99/03/10
SED1354
X19A-G-010-04