SED1354 Datasheet, PDF (22/472 Pages) Epson Company – Color Graphics LCD/CRT Controller

Page 14
3 Typical System Implementation Diagrams
Epson Research and Development
Vancouver Design Center
SH-3
BUS
A21
CSn#
A[20:0]
D[15:0]
WE1#
BS#
RD/WR#
RD#
WE0#
WAIT#
CKIO
RESET#
Power
Management
Oscillator
M/R#
CS#
AB[20:0]
DB[15:0]
WE1#
BS#
RD/WR#
RD#
WE0#
WAIT#
BUSCLK
RESET#
SED1354
FPDAT[15:8]
FPDAT[7:0]
FPSHIFT
FPFRAME
FPLINE
DRDY
LCDPWR
UD[7:0]
LD[7:0]
FPSHIFT 4/8/16-bit
LCD
FPFRAME _Display
FPLINE
MOD
1Mx16
FPM/EDO-DRAM
Figure 3-1: Typical System Diagram – SH-3 Bus, 1Mx16 FPM/EDO-DRAM
SED1354
X19A-A-002-16
Hardware Functional Specification
Issue Date: 99/05/18