SED1354 Datasheet, PDF (316/472 Pages) Epson Company – Color Graphics LCD/CRT Controller

Page 16
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Epson Research and Development
Vancouver Design Center
Table 3-3: Connectors Pinout for Channel A6 (Continued)
FPGA Signal
chA6p11
chA6p12
chA6p13
chA6p14
chA6p15
chA6p16
chA6p17
chA6p18
chA6p19
chA6p20
chA6p21
chA6p22
chA6p23
chA6p24
chA6p25
chA6p26
chA6p27
chA6p28
chA6p29
chA6p30
Channel A6
SED1354 Signal
Pin #
SmZ
M/R#
21
RD#
22
WE1#
23
RESET#
24
N/C
25
N/C
26
N/C
27
D14
28
D13
29
D12
30
D11
31
D9
32
D8
33
D7
34
D6
35
D5
36
D3
37
D2
38
D1
39
D0
40
FPGA Signal
GND
GND
chA6p34
GND
GND
GND
chA6p33
GND
GND
GND
chA6p32
GND
GND
GND
GND
chA6p31
GND
GND
GND
GND
SED1354 Signal
GND
GND
N/C
GND
GND
GND
D15
GND
GND
GND
D10
GND
GND
GND
GND
D4
GND
GND
GND
GND
SDU1354-D9000
X19A-G-003-04
Evaluation Board User Manual
Issue Date: 98/10/29