SED1354 Datasheet, PDF (287/472 Pages) Epson Company – Color Graphics LCD/CRT Controller

Epson Research and Development
Vancouver Design Center
Page 13
6 Technical Description
6.1 ISA Bus Support
The SDU1354B0C directly supports the 16-bit ISA bus environment. All the configuration options
[MD15:0] are either hard-wired or selectable through the five-position DIP Switch S1. Refer to
Table 2-1 “Configuration DIP Switch Settings,” on page 8 for details.
Note
1. The 8-bit ISA bus is not supported by the SDU1354B0C board design.
2. The SED1354 is a memory-mapped device with 2M bytes of linear addressed display buffer
memory as well as a separate 37 byte register space. On the SDU1354B0C, the SED1354
registers have been mapped to a start-address of C00000h and the 2M byte display buffer has
been mapped to a start-address of E00000h.
3. When using this board in a PC environment, system memory must be limited to 12M bytes as
more than this will conflict with the SED1354 display buffer/register addresses.
Note
Due to backwards compatibility with the SDU1354B0B Evaluation Board, which supports both
an 8 and a 16-bit CPU interface, third party software must perform a write to address D00000h to
enable a 16-bit ISA environment. This must be done prior to initializing the SED1354. Failure to
do so will result in the SED1354 being configured as a 16-bit device (default, power-up), with
the ISA Bus interface (supported through the PAL (U4)) configured for an 8-bit interface.
The Epson supplied software performs this function automatically.
SDU1354B0C Rev.1.0 ISA Bus Evaluation Board User Manual
Issue Date: 98/10/29
SED1354
X19A-G-004-05