SED1354 Datasheet, PDF (401/472 Pages) Epson Company – Color Graphics LCD/CRT Controller

Epson Research and Development
Vancouver Design Center
Page 13
4.2 SED1354 Hardware Configuration
The SED1354 latches MD15 through MD0 to allow selection of the bus mode and other
configuration data on the rising edge of RESET#. Table 4-2 shows the settings used for the
SED1354 in these interfaces. MD1, MD2, and MD3 should be set to select either MC68000
Bus 1 mode or Generic bus mode as desired. The other settings are identical for either bus
mode.
Table 4-1: Summary of Power-On/Reset Options
SED1354
Pin Name
value on this pin at rising edge of RESET# is used to configure:(1/0)
1
0
MD0 8-bit host bus interface
16-bit host bus interface
MD1
MD2 See “Host Bus Selection” table below
See “Host Bus Selection” table below
MD3
MD4 Little Endian
Big Endian
MD5 Wait# signal is active high
Wait# signal is active low
MD6
MD7
See “Memory Configuration” table below See “Memory Configuration” table below
MD8
Configure DACRD#, BLANK#, DACP0,
DACWR#, DACRS0, DACRS1, HRTC,
VRTC as GPIO4-11
Configure DACRD#, BLANK#, DACP0,
DACWR#, DACRS0, DACRS1, HRTC, VRTC
as DAC / CRT outputs
MD9
Configure SUSPEND# pin as GPO output
Configure SUSPEND# pin as Hardware
Suspend Enable
MD10 Active low (On) LCDPWR / GPO polarity Active high (On) LCDPWR / GPO polarity
MD11 Reserved
MD12 Reserved
MD13 Reserved
MD14 Reserved
MD15 Reserved
= required settings for MC68328 support.
MD3
0
0
0
0
1
Table 4-2: SED1354 Host Bus Selection
MD2
0
0
1
1
x
MD1
0
1
0
1
x
Option
1
2
3
4
5
Host Bus Interface
SH-3 bus interface
MC68K bus 1 interface (e.g. MC68000)
MC68K bus 2 interface (e.g. MC68030)
Generic bus interface (e.g. MC68328, ISA bus interface)
Reserved
= required settings for MC68328 support.
Interfacing to the Motorola MC68328 "Dragonball" Microprocessor
Issue Date: 99/04/19
SED1354
X19A-G-013-01