SED1354 Datasheet, PDF (131/472 Pages) Epson Company – Color Graphics LCD/CRT Controller

Epson Research and Development
Vancouver Design Center
Page 123
2 Bit-Per-Pixel Mode
Green Look-Up Table
Bank 0
0
1
2
3
Bank 1
4
5
6
7
Bank 2
8
9
A
B
Bank 3
C
D
E
F
00
01
Bank
Select
Logic
10
11
Selected Bank
00
01
10
11
Entry
Select
Logic
4-bit display data output
Bank Select bits [1:0]
REG[27h] bits [1:0]
2-bit pixel data
Note: the above depiction is intended to show the display data output path only. The CPU R/W access to the individual
Look-Up Tables is not affected by the various “banking” configurations.
Figure 12-2: 2 Bit-Per-Pixel – 4-Level Gray-Shade Mode Look-Up Table Architecture
4 Bit-Per-Pixel Mode
Green Look-Up Table
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Entry
Select
Logic
4-bit pixel data
4-bit display data output
Figure 12-3: 4 Bit-Per-Pixel – 16-Level Gray-Shade Mode Look-Up Table Architecture
Hardware Functional Specification
Issue Date: 99/05/18
SED1354
X19A-A-002-16