SED1354 Datasheet, PDF (30/472 Pages) Epson Company – Color Graphics LCD/CRT Controller

Page 22
Epson Research and Development
Vancouver Design Center
5.4 Pin Description
Key:
I
O
IO
P
C
CD
CS
COx
TSx
TSxD
CNx
= Input
= Output
= Bi-Directional (Input/Output)
= Power pin
= CMOS level input
= CMOS level input with pull-down resistor (typical values of 100KΩ/180KΩ at 5V/3.3V respectively)
= CMOS level Schmitt input
= CMOS output driver, x denotes driver type (1=3/-1.5mA, 2=6/-3mA, 3=12/-6mA)
= Tri-state CMOS output driver, x denotes driver type (1=3/-1.5mA, 2=6/-3mA, 3=12/-6mA)
=
Tri-state CMOS output driver with pull-down resistor (typical values of 100KΩ/180KΩ at 5V/3.3V
respectively), x denotes driver type (1=3/-1.5mA, 2=6/-3mA, 3=12/-6mA)
= CMOS low-noise output driver, x denotes driver type (1=3/-1.5mA, 2=6/-3mA, 3=12/-6mA)
5.4.1 Host Interface
Table 5-1: Host Interface Pin Descriptions
Pin Name Type
Pin #
F0A _F2A
F1A
Driver
Reset =
0 Value
Description
This pin has multiple functions.
• For SH-3 mode, this pin inputs system address bit 0 (A0).
• For MC68K Bus 1, this pin inputs the lower data strobe (LDS#).
AB0
I
3
5
CS
Hi-Z
• For MC68K Bus 2, this pin inputs system address bit 0 (A0).
• For Generic Bus, this pin inputs system address bit 0 (A0).
AB[20:1] I
DB[15:0] IO
111-128
1, 2
125-142
3,4
C
Hi-Z
16-31 18-33 C/TS2 Hi-Z
See Table 5-9: “Host Bus Interface Pin Mapping,” on page 32 for
summary.
System address bus bits [20:1].
System data bus. Unused data pins should be connected to IO
V_DD.
• For SH-3 mode, these pins are connected to D[15:0].
• For MC68K Bus 1, these pins are connected to D[15:0].
• For MC68K Bus 2, these pins are connected to D[31:16] for 32-
bit devices (e.g. MC68030) or D[15:0] for 16-bit devices (e.g.
MC68340).
• For Generic Bus, these pins are connected to D[15:0].
See Table 5-9: “Host Bus Interface Pin Mapping,” on page 32 for
summary.
SED1354
X19A-A-002-16
Hardware Functional Specification
Issue Date: 99/05/18