SED1354 Datasheet, PDF (40/472 Pages) Epson Company – Color Graphics LCD/CRT Controller

Page 32
Epson Research and Development
Vancouver Design Center
5.6 Multiple Function Pin Mapping
SED1354
Pin Names
AB[20:1]
AB0
DB[15:0]
WE1#
M/R#
CS#
BUSCLK
BS#
RD/WR#
RD#
WE0#
WAIT#
RESET#
Table 5-9: Host Bus Interface Pin Mapping
SH-3
A[20:1]
A0
D[15:0]
WE1#
External Decode
CSn#
CKIO
BS#
RD/WR#
RD#
WE0#
WAIT#
RESET#
MC68K Bus 1
A[20:1]
LDS#
D[15:0]
UDS#
External Decode
External Decode
CLK
AS#
R/W#
Connect to IO V_DD
Connect to IO V_DD
DTACK#
RESET#
MC68K Bus 2
A[20:1]
A0
D[31:16]
DS#
External Decode
External Decode
CLK
AS#
R/W#
SIZ1
SIZ0
DSACK1#
RESET#
Generic MPU
A[20:1]
A0
D[15:0]
WE1#
External Decode
External Decode
BCLK
Connect to IO V_DD
RD1#
RD0#
WE0#
WAIT#
RESET#
SED1354
Pin Names
MD[15:0]
MA[8:0]
MA9
MA10
MA11
UCAS#
LCAS#
WE#
RAS#
Table 5-10: Memory Interface Pin Mapping
Sym 256Kx16
2-CAS# 2-WE#
GPIO3¹
UCAS#
LCAS#
WE#
UWE#
CAS#
LWE#
FPM/EDO-DRAM
Asym 256Kx16
Sym 1Mx16
2-CAS# 2-WE#
2-CAS# 2-WE#
DQ[15:0]
A[8:0]
A9
GPIO1¹
GPIO2¹
UCAS#
UWE#
UCAS#
UWE#
LCAS#
CAS#
LCAS#
CAS#
WE#
LWE#
WE#
LWE#
RAS#
Asym 1Mx16
2-CAS# 2-WE#
A10
A11
UCAS#
UWE#
LCAS#
CAS#
WE#
LWE#
Note
1. All GPIO pins default to input on reset, and unless programmed otherwise should be
connected to either V_SS or IO V_DD if not used.
SED1354
X19A-A-002-16
Hardware Functional Specification
Issue Date: 99/05/18