SED1354 Datasheet, PDF (23/472 Pages) Epson Company – Color Graphics LCD/CRT Controller

Epson Research and Development
Vancouver Design Center
MC68000
BUS
A[23:21]
FC0, FC1
A[20:1]
D[15:0]
LDS#
UDS#
AS#
R/W#
DTACK#
BCLK
RESET#
Decoder
Decoder
.
Power
Management
Oscillator
M/R#
CS#
AB[20:1]
DB[15:0]
AB0#
WE1#
BS#
RD/WR#
WAIT#
BUSCLK
RESET#
SED1354
FPDAT[15:8]
FPDAT[7:0]
FPSHIFT
FPFRAME
FPLINE
DRDY
LCDPWR
Page 15
UD[7:0]
LD[7:0]
FPSHIFT ^4/8/16-bit
LCD
FPFRAME _Display
FPLINE
MOD
1Mx16
FPM/EDO-DRAM
Figure 3-2: Typical System Diagram – MC68K Bus 1, 1Mx16 FPM/EDO-DRAM (16-Bit MC68000)
MC68030
BUS
A[31:21]
FC0, FC1
A[20:0]
D[31:16]
DS#
AS#
R/W#
SIZ1
SIZ0
DSACK1#
BCLK
RESET#
Decoder
Decoder
Power
Management
Oscillator
M/R#
CS#
AB[20:0]
DB[15:0]
WE1#
BS#
RD/WR#
RD#
WE0#
WAIT#
BUSCLK
RESET#
SED1354
FPDAT[15:8]
FPDAT[7:0]
FPSHIFT
FPFRAME
FPLINE
DRDY
LCDPWR
UD[7:0]
LD[7:0]
FPSHIFT 4/8/16-bit
LCD
FPFRAME _Display
FPLINE
MOD
256Kx16
FPM/EDO-DRAM
Figure 3-3: Typical System Diagram – MC68K Bus 2, 256Kx16 FPM/EDO-DRAM (32-Bit MC68030)
Hardware Functional Specification
Issue Date: 99/05/18
SED1354
X19A-A-002-16