SED1354 Datasheet, PDF (314/472 Pages) Epson Company – Color Graphics LCD/CRT Controller

Page 14
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Epson Research and Development
Vancouver Design Center
Table 3-2: Connector Pinout for Channel A7 (Continued)
FPGA Signal
chA7p11
chA7p12
chA7p13
chA7p14
chA7p15
chA7p16
chA7p17
chA7p18
chA7p19
chA7p20
chA7p21
chA7p22
chA7p23
chA7p24
chA7p25
chA7p26
chA7p27
chA7p28
chA7p29
chA7p30
Channel A7
SED1354 Signal
Pin #
SmZ
N/C
21
N/C
22
A20
23
A18
24
A17
25
A16
26
N/C
27
A14
28
A13
29
A12
30
A11
31
A9
32
A8
33
A7
34
A6
35
A5
36
A3
37
A2
38
A1
39
A0
40
FPGA Signal
GND
GND
chA7p34
GND
GND
GND
chA7p33
GND
GND
GND
chA7p32
GND
GND
GND
GND
chA7p31
GND
GND
GND
GND
SED1354 Signal
GND
GND
A19
GND
GND
GND
A15
GND
GND
GND
A10
GND
GND
GND
GND
A4
GND
GND
GND
GND
SDU1354-D9000
X19A-G-003-04
Evaluation Board User Manual
Issue Date: 98/10/29