SED1354 Datasheet, PDF (108/472 Pages) Epson Company – Color Graphics LCD/CRT Controller

Page 100
Epson Research and Development
Vancouver Design Center
Screen 2 Display Start Address Register 0 RW
REG[13h]
RW
Start Address Start Address Start Address Start Address Start Address Start Address Start Address Start Address
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Screen 2 Display Start Address Register 1
REG[14h]
RW
Start Address Start Address Start Address Start Address Start Address Start Address Start Address Start Address
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Screen 2 Display Start Address Register 2
REG[15h]
n/a
n/a
n/a
n/a
RW
Start Address Start Address Start Address Start Address
Bit 19
Bit 18
Bit 17
Bit 16
REG[13h] bits 7-0
REG[14h] bits 7-0
REG[15h] bits 3-0
Screen 2 Start Address Bits [19:0]
This register forms the 20-bit address for the starting word of the screen 2 image in the display
buffer. Note that this is a word address. An entry of 0000h into these registers represents the first
word of display memory, an entry of 0001h represents the second word of display memory, and so
on. See Section 10, “Display Configuration” on page 116 for details.
Memory Address Offset Register 0
REG[16h]
Memory
Address
Offset Bit 7
Memory
Address
Offset Bit 6
Memory
Address
Offset Bit 5
Memory
Address
Offset Bit 4
Memory
Address
Offset Bit 3
Memory
Address
Offset Bit 2
Memory
Address
Offset Bit 1
RW
Memory
Address
Offset Bit 0
Memory Address Offset Register 1
REG[17h]
RW
Memory
Memory
n/a
n/a
n/a
n/a
n/a
n/a
Address
Address
Offset Bit 9 Offset Bit 8
REG[16] bits 7-0
REG[17] bits 1-0
Memory Address Offset Bits [9:0]
These bits are the 10-bit address offset from the starting word of line “n” to the starting word of line
“n + 1”. This value is applied to both screen 1 and screen 2.
Note
This value is in words and must be programmed ≥ REG[04h].
A virtual image can be formed by setting this register to a value greater than the width of the dis-
play. The displayed image is a window into the larger virtual image.
See Section 10, “Display Configuration” on page 116 for details.
SED1354
X19A-A-002-16
Hardware Functional Specification
Issue Date: 99/05/18