M16C6NK Datasheet, PDF (92/404 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

Under development
This document is under development and its contents are subject to change.
M16C/6N Group (M16C/6NK, M16C/6NM)
8. Clock Generating Circuit
8.4.3.3 Exiting Stop Mode
_______
Stop mode is exited by a hardware reset, NMI interrupt or peripheral function interrupt.
_______
When the hardware reset or NMI interrupt is used to exit wait mode, set all ILVL2 to ILVL0 bits in the
interrupt control registers for the peripheral function interrupt to “000b” (interrupt disabled) before setting
the CM10 bit in the CM1 register to “1”.
When the peripheral function interrupt is used to exit stop mode, set the CM10 bit to “1” after the following
settings are completed.
(1) The ILVL2 to ILVL0 bits in the interrupt control registers, for the peripheral function interrupt used to
exit stop mode, must have larger value than that of the RLVL2 to RLVL0 bits.
The ILVL2 to ILVL0 bits in all other interrupt control registers, for the peripheral function interrupts
which are not used to exit stop mode, must be set to “000b” (interrupt disabled).
(2) Set the I flag to “1”.
(3) Start operation of peripheral function being used to exit wait mode.
When exiting stop mode by the peripheral function interrupt, the interrupt routine is performed when
an interrupt request is generated and the CPU clock is supplied again.
_______
When stop mode is exited by the peripheral function interrupt or NMI interrupt, the CPU clock source is
as follows, in accordance with the CPU clock source setting before the microcomputer had entered stop
mode.
• When the sub clock is the CPU clock before entering stop mode:
Sub clock
• When the main clock is the CPU clock source before entering stop mode: Main clock divided by 8
• When the on-chip oscillator clock is the CPU clock source before entering stop mode:
On-chip oscillator clock divided by 8
Rev.2.00 Nov 28, 2005 page 74 of 378
REJ09B0124-0200