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M16C6NK Datasheet, PDF (170/404 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES
Under development
This document is under development and its contents are subject to change.
M16C/6N Group (M16C/6NK, M16C/6NM)
15. Serial Interface
RXDi
RXD data
reverse circuit
STPS
1SP
0
SP
SP
1
2SP
IOPOL
No reverse
0
1 Reverse
PRYE
PAR
disabled
0
PAR
Clock
synchronous
type
0
1
PAR
enabled
1
UART
SMD2 to SMD0
Clock
synchronous type
UART
(7 bits)
UART
(8 bits)
UART(7 bits)
0
0
1
UART
(9 bits)
1
Clock
synchronous type
UART
(8 bits)
UART
(9 bits)
UARTi receive register
0 0 0 0 0 0 0 D8
D7 D6 D5 D4 D3 D2 D1 D0 UiRB register
Logic reverse circuit + MSB/LSB conversion circuit
Data bus high-order bits
Data bus low-order bits
Logic reverse circuit + MSB/LSB conversion circuit
D8
D7 D6 D5 D4 D3 D2 D1 D0 UiTB register
STPS
2SP
1
PRYE
PAR
enabled
1
SMD2 to SMD0
UART
1
UART
(9 bits)
1
UART
(8 bits)
UART
(9 bits)
Clock
synchronous type
1
SP
SP
PAR
0
0
1SP
0
PAR
disabled
Clock
synchronous
type
i = 0 to 2
SP: Stop bit
PAR: Parity bit
0
UART
(7 bits)
UART
(8 bits)
Clock
synchronous type
0
UART(7 bits)
UARTi transmit register
Error signal output
disable
0
IOPOL No reverse
0
Error signal
output circuit
UiERE 1
Error signal output
enable
TXD data
1 reverse circuit
Reverse
SMD2 to SMD0, STPS, PRYE, IOPOL, CKDIR: Bits in UiMR register
CLK1 to CLK0, CKPOL, CRD, CRS: Bits in UiC0 register
UiERE: Bit in UiC1 register
TXDi
Figure 15.4 UARTi Transmit/Receive Unit
Rev.2.00 Nov 28, 2005 page 152 of 378
REJ09B0124-0200