M16C6NK Datasheet, PDF (183/404 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

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M16C/6N Group (M16C/6NK, M16C/6NM)
15. Serial Interface
15.1.1.5 Serial Data Logic Switching Function
When the UiLCH bit in the UiC1 register (i = 0 to 2) = 1 (reverse), the data written to the UiTB register has
its logic reversed before being transmitted. Similarly, the received data has its logic reversed when read
from the UiRB register. Figure 15.14 shows serial data logic.
(1) When the UiLCH bit in the UiC1 register = 0 (no reverse)
Transfer clock ^"H"
"L"
TXDi "H"
(no reverse) _"L"
D0 D1 D2 D3 D4 D5 D6 D7
(2) When the UiLCH bit in the UiC1 register = 1 (reverse)
Transfer clock ^"H"
"L"
TXDi "H"
(reverse) _"L"
D0 D1 D2 D3 D4 D5 D6 D7
i = 0 to 2
* This applies to the case where the CKPOL bit in the UiC0 register = 0
(transmit data output at the falling edge and the receive data taken in
at the rising edge of the transfer clock) and the UFORM bit = 0 (LSB first).
Figure 15.14 Serial Data Logic Switching
15.1.1.6 Transfer Clock Output From Multiple Pins (UART1)
Use the CLKMD1 to CLKMD0 bits in the UCON register to select one of the two transfer clock output
pins. Figure 15.15 shows the transfer clock output from the multiple pins function usage. This function
can be used when the selected transfer clock for UART1 is an internal clock.
Microcomputer
TXD1(P6_7)
CLKS1(P6_4)
CLK1(P6_5)
IN
CLK
Transfer enabled when
the CLKMD0 bit in the
UCON register = 0
IN
CLK
Transfer enabled when
the CLKMD0 bit = 1
* This applies to the case where the CKDIR bit in the U1MR register
= 0 (internal clock) and the CLKMD1 bit in the UCON register = 1
(transfer clock output from multiple pins).
Figure 15.15 Transfer Clock Output From Multiple Pins
Rev.2.00 Nov 28, 2005 page 165 of 378
REJ09B0124-0200