M16C6NK Datasheet, PDF (199/404 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

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M16C/6N Group (M16C/6NK, M16C/6NM)
15. Serial Interface
Table 15.13 STSPSEL Bit Functions
Function
STSPSEL Bit = 0
Output of SCLi and SDAi Pins
Output of transfer clock and
data
Output of start/stop condition is
accomplished by a program
using ports (not automatically
generated in hardware)
Start/Stop Condition Interrupt
Start/stop condition detection
Request Generation Timing
STSPSEL Bit = 1
Output of a start/stop condition
according to the STAREQ,
RSTAREQ and STPREQ bits
Finish generating start/stop condition
(1) When slave
CKDIR bit = 1 (external clock)
STSPSEL bit ₀
SCLi
1st 2nd 3rd 4th 5th 6th 7th 8th 9th bit
SDAi
Start condition
detection interrupt
Stop condition
detection interrupt
(2) When master
CKDIR bit = 0 (internal clock), CKPH bit = 1 (clock delayed)
STSPSEL bit
SCLi
Set to "1" in
a program
Set to "0" in
a program
Set to "1" in
a program
1st 2nd 3rd 4th 5th 6th 7th 8th 9th bit
Set to "0" in
a program
SDAi
Set STAREQ bit
= 1 (start)
Start condition
detection interrupt
Figure 15.26 STSPSEL Bit Functions
Set STPREQ bit
= 1 (start)
Stop condition
detection interrupt
15.1.3.3 Arbitration
Unmatching of the transmit data and SDAi pin input data is checked synchronously with the rising edge
of SCLi. Use the ABC bit in the UiSMR register to select the timing at which the ABT bit in the UiRB
register is updated. If the ABC bit = 0 (updated per bit), the ABT bit is set to “1” at the same time
unmatching is detected during check, and is set to “0” when not detected. In cases when the ABC bit is
set to “1”, if unmatching is detected even once during check, the ABT bit is set to “1” (unmatching
detected) at the falling edge of the clock pulse of 9th bit. If the ABT bit needs to be updated per byte, set
the ABT bit to “0” (undetected) after detecting acknowledge in the first byte, before transferring the next
byte.
Setting the ALS bit in the UiSMR2 register to “1” (SDA output stop enabled) causes arbitration-lost to
occur, in which case the SDAi pin is placed in the high-impedance state at the same time the ABT bit is
set to “1” (unmatching detected).
Rev.2.00 Nov 28, 2005 page 181 of 378
REJ09B0124-0200