M16C6NK Datasheet, PDF (274/404 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

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M16C/6N Group (M16C/6NK, M16C/6NM)
20. Programmable I/O Ports
Pull-up Control Register 0 ⁽¹⁾
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
PUR0
Address
03FCh
After Reset
00h
Bit Symbol
Bit Name
Function
RW
PU00
PU01
P0_0 to P0_3 Pull-Up
P0_4 to P0_7 Pull-Up
0 : Not pulled high
RW
1 : Pulled high ⁽²⁾
RW
PU02
P1_0 to P1_3 Pull-Up
RW
PU03
P1_4 to P1_7 Pull-Up
RW
PU04
P2_0 to P2_3 Pull-Up
RW
PU05
P2_4 to P2_7 Pull-Up
RW
PU06
P3_0 to P3_3 Pull-Up
RW
PU07
P3_4 to P3_7 Pull-Up
RW
NOTES:
1. During memory expansion and microprocessor modes, the pins are not pulled high although their corresponding
register contents can be modified.
* Not available memory expansion and microprocessor modes in T/V-ver..
2. The pin for which this bit is "1" (pulled high) and the direction bit is "0" (input mode) is pulled high.
Pull-up Control Register 1
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
PUR1
Address
03FDh
After Reset ⁽¹⁾
00000000b
00000010b
Bit Symbol
Bit Name
Function
RW
PU10
P4_0 to P4_3 Pull-Up ⁽²⁾
0 : Not pulled high
RW
PU11
P4_4 to P4_7 Pull-Up ⁽³⁾
1 : Pulled high ⁽⁵⁾
RW
PU12
P5_0 to P5_3 Pull-Up ⁽²⁾
RW
PU13
P5_4 to P5_7 Pull-Up ⁽²⁾
RW
PU14
P6_0 to P6_3 Pull-Up
RW
PU15
P6_4 to P6_7 Pull-Up
RW
PU16
P7_0, P7_2 and P7_3 Pull-Up ⁽⁴⁾
RW
PU17
P7_4 to P7_7 Pull-Up
RW
NOTES:
1. The values after hardware reset is as follows:
00000000b when input on CNVSS pin is "L".
00000010b when input on CNVSS pin is "H". (CNVSS pin = H is not available in T/V-ver..)
The values after software reset, watchdog timer reset and oscillation stop detection reset are as follows:
00000000b when the PM 01 to PM00 bits in the PM0 register are "00b" (single-chip mode).
00000010b when the PM 01 to PM00 bits are "01b" (memory expansion mode) or "11b" (microprocessor mode).
* Not available memory expansion and microprocessor modes in T/V-ver..
2. During memory expansion and microprocessor modes, the pins are not pulled high although their corresponding
register contents can be modified.
* Not available memory expansion and microprocessor modes in T/V-ver..
3. If the PM01 to PM00 bits are set to "01b" (memory expansion mode) or "11b" (microprocessor mode) in a
program during single-chip mode, the PU11 bit becomes "1".
* Not available memory expansion and microprocessor modes in T/V-ver..
4. The P7_1 pin does not have pull-up.
5. The pin for which this bit is "1" (pulled high) and the direction bit is "0" (input mode) is pulled high.
Pull-up Control Register 2
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
PUR2
Address
03FEh
After Reset
00h
Bit Symbol
Bit Name
Function
RW
PU20
P8_0 to P8_3 Pull-Up
0 : Not pulled high
RW
PU21
P8_4, P8_6 and P8_7 Pull-Up ^{(1) 1 : Pulled high (3)}
RW
PU22
P9_0, P9_2 and P9_3 Pull-Up ⁽²⁾
RW
PU23
P9_4 to P9_7 Pull-Up
RW
PU24
P10_0 to P10_3 Pull-Up
RW
PU25
P10_4 to P10_7 Pull-Up
RW
-
(b7-b6)
Nothing is assigned. When write, set to "0".
When read, their contents are "0".
-
NOTES:
1. The P8_5 pin does not have pull-up.
2. The P9_1 pin does not have pull-up.
3. The pin for which this bit is "1" (pulled high) and the direction bit is "0" (input mode) is pulled high.
Figure20.9 PUR0, PUR1 and PUR2 Registers
Rev.2.00 Nov 28, 2005 page 256 of 378
REJ09B0124-0200