M16C6NK Datasheet, PDF (160/404 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

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M16C/6N Group (M16C/6NK, M16C/6NM)
14. Three-Phase Motor Control Timer Function
Three-Phase Output Buffer Register i (i = 0, 1) ⁽¹⁾
b7 b6 b5 b4 b3 b2 b1 b0
00
Symbol
IDB0, IDB1
Address
01CAh, 01CBh
After Reset
00h
Bit
Symbol
Bit Name
Function
RW
DUi U-Phase Output Buffer i Write output level
RW
DUBi U-Phase Output Buffer i ^{0: Active level}
RW
1: Inactive level
DVi V-Phase Output Buffer i
RW
DVBi V-Phase Output Buffer i When read, the value of the three- RW
DWi W-Phase Output Buffer i ^{phase shift register is read.}
RW
DWBi W-Phase Output Buffer i
RW
-
(b7-b6) ^{Reserved Bit}
Set to "0"
RO
NOTE:
1. Values of the IDB0 and IDB1 registers are transferred to the three-phase output shift register by a transfer
trigger.
After the transfer trigger occurs, the values written in the IDB0 register determine each phase output
signal first. Then the value written in the IDB1 register on the falling edge of timers A1, A2 and A4 one-shot
pulse determines each phase output signal.
Dead Time Timer ^{(1) (2)}
b7
b0
Symbol
DTT
Address
01CCh
After Reset
Indeterminate
Function
Setting Range RW
If setting value is n, the timer stops when counting
n times a count source selected by the INV12 bit
in the INVC1 register after start trigger occurs.
Positive or negative phase, which changes from
1 to 255
WO
inactive level to active level, shifts when the dead
time timer stops.
NOTES:
1. Use the MOV instruction to set the DTT register.
2. The DTT register is enabled when the INV15 bit in the INVC1 register is set to "0" (dead time enabled).
No dead time can be set when the INV15 bit is set to "1" (dead time disabled). The INV06 bit in the INVC0
register determines start trigger of the DTT register.
Figure 14.4 IDB0 and IDB1 Registers and DTT Register
Rev.2.00 Nov 28, 2005 page 142 of 378
REJ09B0124-0200