M16C6NK Datasheet, PDF (342/404 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

Under development
This document is under development and its contents are subject to change.
M16C/6N Group (M16C/6NK, M16C/6NM)
22. Electric Characteristics (Normal-ver.)
Memory Expansion Mode and Microprocessor Mode
(For 2-wait setting and external area access)
Read timing
tcyc
BCLK
CSi
ADi
BHE
ALE
td(BCLK-CS)
30ns.max
td(BCLK-AD)
30ns.max
td(BCLK-ALE)
30ns.max
th(BCLK-ALE)
-4ns.min
th(BCLK-CS)
4ns.min
th(BCLK-AD)
4ns.min
th(RD-AD)
0ns.min
RD
DBi
Hi-Z
Write timing
BCLK
td(BCLK-RD)
30ns.max
tac2(RD-DB)
(2.5 ✕ tcyc-60)ns.max
tSU(DB-RD)
50ns.min
tcyc
th(BCLK-RD)
0ns.min
th(RD-DB)
0ns.min
CSi
ADi
BHE
ALE
td(BCLK-CS)
30ns.max
td(BCLK-AD)
30ns.max
td(BCLK-ALE)
30ns.max
th(BCLK-ALE)
-4ns.min
th(BCLK-CS)
4ns.min
th(BCLK-AD)
4ns.min
th(WR-AD)
(0.5 ✕ tcyc-10)ns.min
WR, WRL
WRH
DBi
td(BCLK-WR)
30ns.max
td(BCLK-DB)
40ns.max
Hi-Z
th(BCLK-WR)
0ns.min
th(BCLK-DB)
4ns.min
1
tcyc =
f(BCLK)
td(DB-WR)
(1.5 ✕ tcyc-40)ns.min
Measuring conditions :
VCC = 3.3 V
Input timing voltage : VIL = 0.6 V, VIH = 2.7 V
Output timing voltage : VOL = 1.65 V, VOH = 1.65 V
th(WR-DB)
(0.5 ✕ tcyc-10)ns.min
Figure 22.17 Timing Diagram (5)
VCC = 3.3V
Rev.2.00 Nov 28, 2005 page 324 of 378
REJ09B0124-0200