M16C6NK Datasheet, PDF (221/404 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

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M16C/6N Group (M16C/6NK, M16C/6NM)
16. A/D Converter
fAD
ADTRG
VREF
AVSS
CKS2
0
1/3
1
A/D conversion rate selection
1/2
1/2
1
0 _CKS0
1 ^CKS1
0
Software trigger ^{0 TRG}
VCUT
0
1
Resistor ladder
1
A/D trigger
Successive conversion register _{ADCON1 register}
φAD
ADCON0 register
AD0 register
AD1 register
AD2 register
AD3 register
AD4 register
AD5 register
AD6 register
AD7 register
Decoder
for A/D register
(1) ^PM00
PM01
Port P0 group
AN0_0
AN0_1
AN0_2
AN0_3
AN0_4
AN0_5
AN0_6
AN0_7
Port P2 group
AN2_0
AN2_1
AN2_2
AN2_3
AN2_4
AN2_5
AN2_6
AN2_7
Data bus high-order
Data bus low-order
ADCON2 register
CH2 to CH0
=000b
=001b
=010b
=011b
=100b
=101b
=110b
=111b
CH2 to CH0
=000b
=001b
=010b
=011b
=100b
=101b
=110b
=111b
Port P10 group
AN0
AN0
AN0
AN0
AN0
AN0
AN0
AN0
CH2 to CH0
=000b
=001b
=010b
=011b
=100b
=101b
=110b
=111b
Decoder
for channel
selection
VREF
VIN ^Comparator
ADGSEL1 to ADGSEL0=00b ⁽¹⁾
OPA1 to OPA0=00b
PM01 to PM00=00b
ADGSEL1 to ADGSEL0=10b
OPA1 to OPA0=00b
PM01 to PM00=00b
ADGSEL1 to ADGSEL0=11b
OPA1 to OPA0=00b
ADGSEL1 to ADGSEL0=00b
OPA1 to OPA0=11b
(1) _{PM01 to PM00=00b}
ADGSEL1 to ADGSEL0=10b
OPA1 to OPA0=11b
ANEX0
PM01 to PM00=00b
ADGSEL1 to ADGSEL0=11b
OPA1 to OPA0=11b
OPA0=1
OPA1 to OPA0
=01b
ANEX1
OPA1=1
OPA1=1
NOTE:
1. Port P0 group (AN0_0 to AN0_7) can be used as analog input pins even when PM01 to PM00 bits are set to "01b"
(memory expansion mode) and PM05 to PM04 bits are set to "11b" (multiplex bus allocated to the entire CS space).
* Not available memory expansion mode in T/V-ver..
Figure 16.1 A/D Converter Block Diagram
Rev.2.00 Nov 28, 2005 page 203 of 378
REJ09B0124-0200