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M16C6NK Datasheet, PDF (264/404 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES
Under development
This document is under development and its contents are subject to change.
M16C/6N Group (M16C/6NK, M16C/6NM)
19. CAN Module
19.16 CAN Interrupt
The CAN module provides the following CAN interrupts.
• CANi Successful Reception Interrupt ( i = 0, 1)
• CANi Successful Transmission Interrupt
• CAN0/1 Error Interrupt: Error Passive State
Error BusOff State
Bus Error (this feature can be disabled separately)
• CAN0/1 Wake-up Interrupt
When the CPU detects the CANi successful reception/transmission interrupt request, the MBOX bit in the
CiSTR register must be read to determine which slot has generated the interrupt request.
Rev.2.00 Nov 28, 2005 page 246 of 378
REJ09B0124-0200