M16C6NK Datasheet, PDF (366/404 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

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M16C/6N Group (M16C/6NK, M16C/6NM)
23. Usage Precaution
23.8.6 Rewrite Interrupt Control Register
(a) The interrupt control register for any interrupt should be modified in places where no interrupt requests
may be generated. Otherwise, disable the interrupt before rewriting the interrupt control register.
(b) To rewrite the interrupt control register for any interrupt after disabling that interrupt, be careful with
the instruction to be used.
Changing any bit other than IR bit
If while executing an instruction, an interrupt request controlled by the register being modified is
generated, the IR bit of the register may not be set to “1” (interrupt requested), with the result that
the interrupt request is ignored. If such a situation presents a problem, use the instructions shown
below to modify the register.
Usable instructions: AND, OR, BCLR, BSET
Changing IR bit
Depending on the instruction used, the IR bit may not always be set to “0” (interrupt not requested).
Therefore, be sure to use the MOV instruction to set the IR bit to “0”.
(c) When using the I flag to disable an interrupt, refer to the sample program fragments shown below
as you set the I flag. (Refer to (b) for details about rewrite the interrupt control registers in the
sample program fragments.)
Examples 1 through 3 show how to prevent the I flag from being set to “1” (interrupt enabled) before
the interrupt control register is rewritten, owing to the effects of the internal bus and the instruction
queue buffer.
Example 1: Using the NOP instruction to keep the program waiting until the interrupt control register is modified
INT_SWITCH1:
FCLR I
; Disable interrupt.
AND.B #00h, 0055h ; Set the TA0IC register to “00h”.
NOP
;
NOP
FSET I
; Enable interrupt.
The number of the NOP instruction is as follows.
• The PM20 bit in the PM2 register = 1 (1 wait) : 2
• The PM20 bit = 0 (2 waits) : 3
• When using HOLD function : 4
Example 2: Using the dummy read to keep the FSET instruction waiting
INT_SWITCH2:
FCLR I
; Disable interrupt.
AND.B #00h, 0055h ; Set the TA0IC register to “00h”.
MOV.W MEM, R0
; Dummy read.
FSET I
; Enable interrupt.
Example 3: Using the POPC instruction to changing the I flag
INT_SWITCH3:
PUSHC FLG
FCLR I
; Disable interrupt.
AND.B #00h, 0055h ; Set the TA0IC register to “00h”.
POPC FLG
; Enable interrupt.
23.8.7 Watchdog Timer Interrupt
Initialize the watchdog timer after the watchdog timer interrupt request is generated.
Rev.2.00 Nov 28, 2005 page 348 of 378
REJ09B0124-0200