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M16C6NK Datasheet, PDF (273/404 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES
Under development
This document is under development and its contents are subject to change.
M16C/6N Group (M16C/6NK, M16C/6NM)
20. Programmable I/O Ports
Port Pi Register (i = 0 to 7, 9 to 13) (1) (2) (3)
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
P0 to P3
P4 to P7
P9 to P12 (4)
P13 (4)
Address
03E0h, 03E1h, 03E4h, 03E5h
03E8h, 03E9h, 03ECh, 03EDh
03F1h, 03F4h, 03F5h, 03F8h
03F9h
After Reset
Indeterminate
Indeterminate
Indeterminate
Indeterminate
Bit Symbol
Bit Name
Function
RW
Pi_0
Pi_1
Pi_2
Pi_3
Pi_4
Pi_5
Pi_6
Port Pi_0 Bit
Port Pi_1 Bit
Port Pi_2 Bit
Port Pi_3 Bit
Port Pi_4 Bit
Port Pi_5 Bit
Port Pi_6 Bit
The pin level on any I/O port which is set RW
for input mode can be read by reading
the corresponding bit in this register.
RW
The pin level on any I/O port which is RW
set for output mode can be controlled RW
by writing to the corresponding bit in
this register.
RW
0 : "L" level
RW
1 : "H" level
RW
Pi_7
Port Pi_7 Bit
RW
NOTES:
1. Since P7_1 and P9_1 are N channel open-drain ports, the data is high-impedance.
2. During memory expansion and microprocessor modes, the Pi register for the pins functioning as bus control
pins (A0 to A19, D0 to D15, CS0 to CS3, RD, WRL/WR, WRH/BHE, ALE, RDY, HOLD, HLDA and BCLK)
cannot be modified.
* Not available memory expansion and microprocessor modes in T/V-ver..
3. When using the ports P11 to P13, set the PU37 bit in the PUR3 register to "1" (usable).
If this bit is set to "0" (unusable), the P11 to P13 regisrers are set to "00h".
4. The P11 to P13 registers are only in the 128-pin version.
Port P8 Register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
P8
Bit symbol
P8_0
P8_1
Pi8_2
P8_3
P8_4
P8_5
P8_6
P8_7
Bit name
Port P8 _0 Bit
Port P8 _1 Bit
Port P8 _2 Bit
Port P8 _3 Bit
Port P8 _4 Bit
Port P8 _5 Bit
Port P8 _6 Bit
Port P8 _7 Bit
Address
03F0h
After Reset
Indeterminate
Function
RW
The pin level on any I/O port which is set RW
for input mode can be read by reading
the corresponding bit in this register.
RW
The pin level on any I/O port which is RW
set for output mode can be controlled RW
by writing to the corresponding bit in
this register. (Except for P8_5.)
RW
0 : "L" level
RO
1 : "H" level
RW
RW
Port P14 Control Regisrer (128-pin version) (1)
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
PC14
Address
03DEh
After Reset
XX00XXXXb
Bit Symbol
Bit Name
P140
Port P14_0 Bit
P141
Port P14_1 Bit
Function
RW
The pin level on any I/O port which is set
for input mode can be read by reading the
corresponding bit in this register.
RW
The pin level on any I/O port which isset for
output mode can be controlled by writing to
the corresponding bit in this register.
0 : "L" level
RW
1 : "H" level
-
(b3-b2)
Nothing is assigned. When write, set to "0".
When read, their contents are indeterminate.
-
PD140
Port P14_0 Direction 0 : Input mode
Bit
(Functions as an input port)
RW
PD141
Port P14_1 Direction 1 : Output mode
Bit
(Functions as an output port)
RW
-
Nothing is assigned. When write, set to "0".
(b7-b6) When read, their contents are indeterminate.
-
NOTE:
1. When using the port P14, set the PU37 bit in the PUR3 register to "1" (usable).
Figure20.8 P0 to P13 Registers and PC14 Register
Rev.2.00 Nov 28, 2005 page 255 of 378
REJ09B0124-0200