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M16C6NK Datasheet, PDF (356/404 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES
Under development
This document is under development and its contents are subject to change.
M16C/6N Group (M16C/6NK, M16C/6NM)
23. Usage Precaution
23. Usage Precaution
23.1 SFR
There is the SFR which can not be read (containg bits that will result in unknown data when read).
Please set these registers to their previous values with the instructions other than the read modify write
instructions.
Table 23.1 lists the registers contain bits that will result in unknown data when read and Table 23.2 lists the
instruction table for read modify write.
Table 23.1 Registers Contain Bits that Will Result in Unknown Data When Read
Register Name
Timer A1-1 Register (1)
Timer A2-1 Register (1)
Timer A4-1 Register (1)
TA11
TA21
TA41
Symbol
Address
01C3h, 01C2h
01C5h, 01C4h
01C7h, 01C6h
Dead Time Timer
DTT
01CCh
Timer B2 Interrupt Occurrences Frequency Set Counter ICTB2
SI/O6 Bit Rate Generator (2)
S6BRG
01CDh
01D9h
SI/O3 Bit Rate Generator
S3BRG
01E3h
SI/O4 Bit Rate Generator
SI/O5 Bit Rate Generator (2)
S4BRG
S5BRG
01E7h
01EBh
UART2 Bit Rate Generator
U2BRG
01F9h
UART2 Transmit Buffer Register
U2TB
01FBh, 01FAh
Up-Down Flag
Timer A0 Register (3)
Timer A1 Register (1) (3)
Timer A2 Register (1) (3)
Timer A3 Register (3)
Timer A4 Register (1) (3)
UDF
TA0
TA1
TA2
TA3
TA4
0384h
0387h, 0386h
0389h, 0388h
038Bh, 038Ah
038Dh, 038Ch
038Fh, 038Eh
UART0 Bit Rate Generator
U0BRG
03A1h
UART0 Transmit Buffer Register
U0TB
03A3h, 03A2h
UART1 Bit Rate Generator
U1BRG
03A9h
UART1 Transmit Buffer Register
U1TB
03ABh, 03AAh
NOTES:
1. It is affected only in three-phase motor control timer function.
2. These registers are only in the 128-pin version.
3. It is affected only in one-shot timer mode and pulse width modulation mode.
Table 23.2 Instruction Table for Read Modify Write
Function
Mnemonic
Bit Manipulation BCLR, BNOT, BSET, BTSTC, BTSTS
Shift
RCLC, RORC, ROT, SHA, SHL
Arithmetic
ABS, ADC, ADCF, ADD, DEC, EXTS, INC, MUL, MULU, NEG, SBB, SUB
Logical
AND, NOT, OR, XOR
Jump
ADJNZ, SBJNZ
Rev.2.00 Nov 28, 2005 page 338 of 378
REJ09B0124-0200