M16C6NK Datasheet, PDF (58/404 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

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M16C/6N Group (M16C/6NK, M16C/6NM)
6. Processor Mode
Processor Mode Register 0 ⁽¹⁾
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
PM0
Address
0004h
After reset ⁽²⁾
00000000b (CNVSS pin = L)
00000011b (CNVSS pin = H) ⁽⁵⁾
Bit symbol
Bit name
PM00
PM01
Processor Mode Bit ⁽²⁾
Function
RW
b1 b0
0 0 : Single-chip mode
RW
0 1 : Memory expansion mode ⁽⁵⁾
1 0 : Do not set a value
1 1 : Microprocessor mode ⁽⁵⁾
RW
PM02
R/W Mode Select Bit ⁽³⁾
0 : RD, BHE, WR
1 : RD, WRH, WRL
RW
PM03 Software Reset Bit
PM04
PM05
Multiplexed Bus Space
Select Bit ⁽³⁾
Setting this bit to "1" resets the
microcomputer. When read, its
cont^.ent is "0"
RW
b5 b4
0 0 : Multiplexed bus is unused _RW
(Separate bus in the entire CS space)
0 1 : Allocated to CS2 space
1 0 : Allocated to CS1 space
RW
1 1 : Allocated to the entire CS space ⁽⁴⁾
PM06
Port P4_0 to P4_3 Function
Select Bit ⁽³⁾⁾
0 : Address output
1 : Port function
(Address is not output)
RW
PM07
BCLK Output Disable
Bit ⁽³⁾
0 : BCLK is output
1 : BCLK is not output
RW
(Pin is left high-impedance)
NOTES:
1. Write to this register after setting the PRC1 bit in the PRCR register to "1" (write enable).
2. The PM01 to PM00 bits do not change at software reset, watchdog timer reset and oscillation stop detection reset.
* Effective in memory expansion and microprocessor modes (= Normal-ver.)
3. Effective when the PM01 to PM00 bits are set to "01b" (memory expansion mode) or "11b" (microprocessor mode).
* Not available memory expansion and microprocessor modes in T/V-ver.. These bits are reserved bit in
T/V-ver., and set to "0".
4. To set the PM01 to PM00 bits are "01b" and the PM05 to PM04 bits are "11b" (multiplexed bus assigned to
the entire CS space), apply an "H" signal to the BYTE pin (external data bus is 8-bit width).
While the CNVSS pin is held "H" (VCC), do not rewrite the PM05 to PM04 bits to "11b" after reset.
If the PM05 to PM04 bits are set to "11b" during memory expansion mode, P3_1 to P3_7 and P4_0 to P4_3
become I/O ports, in which case the accessible area for each CS is 256 bytes.
* Not available memory expansion and microprocessor modes in T/V-ver..
5. Not available in T/V-ver.. Do not set a value.
Figure 6.1 PM0 Register
Rev.2.00 Nov 28, 2005 page 40 of 378
REJ09B0124-0200