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M16C6NK Datasheet, PDF (169/404 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES
Under development
This document is under development and its contents are subject to change.
M16C/6N Group (M16C/6NK, M16C/6NM)
15. Serial Interface
Main clock, PLL clock, or on-chip oscillator clock
1/2 f2SIO
f1SIO
PCLK1
0
1
f1SIO or f2SIO
1/8
f8SIO
(UART2)
1/4
f32SIO
RXD2
RXD polarity reversing
circuit
Clock source selection
CLK1 to CLK0 CKDIR
f1SIO or f2SIO 00
Internal
f8SIO 01
0
f32SIO 10
1
External
U2BRG
register
1 / (n2+1)
UART reception SMD2 to SMD0
010, 100, 101, 110
1/16
Clock synchronous
type
001
Reception
control circuit
UART transmission
1/16 010, 100, 101, 110
Clock synchronous
type
001
Transmission
control circuit
Clock synchronous type
(when internal clock is selected)
1/2
0
1
CLK2
CTS2 /
RTS2
CKPOL
CLK
polarity
reversing
circuit
Clock synchronous type
Clock synchronous type (when external clock is selected) CKDIR
(when internal clock is selected)
CTS/RTS disabled
CTS/RTS selected
RTS2
1
CRS 0
VSS CTS/RTS disabled
1
CTS2
Receive
clock
Transmit
clock
n2: Values set to the U2BRG register
0
CRD
PCLK1: Bit in PCLKR register
SMD2 to SMD0, CKDIR: Bits in U2MR register
CLK1 to CLK0, CKPOL, CRD, CRS: Bits in U2C0 register
Transmit/
receive
unit
TXD
polarity
reversing
circuit (1)
TXD2
Figure 15.3 UART2 Block Diagram
Rev.2.00 Nov 28, 2005 page 151 of 378
REJ09B0124-0200