M16C6NK Datasheet, PDF (115/404 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

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M16C/6N Group (M16C/6NK, M16C/6NM)
10. Interrupt
Interrupt Request Cause Select Register 2
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
IFSR2
Address
01CFh
After Reset
X0000000b
Bit Symbol
Bit Name
Function
RW
IFSR20
Interrupt Request Cause
Select Bit ^{(2) (6)}
0 : Timer A2
1 : INT7
RW
IFSR21
Interrupt Request Cause
Select Bit ^{(3) (6)}
0 : Timer A3
1 : INT6
RW
IFSR22
Interrupt Request Cause
Select Bit ^{(4) (6)}
0 : Timer B1
1 : INT8
RW
IFSR23
INT6 Interrupt Polarity
Switching Bit ^{(1) (6)}
0 : One edge
1 : Both edges
RW
IFSR24
INT7 Interrupt Polarity
Switching Bit ^{(1) (6)}
0 : One edge
1 : Both edges
RW
IFSR25
INT8 Interrupt Polarity
Switching Bit ^{(1) (6)}
0 : One edge
1 : Both edges
RW
IFSR26
Interrupt Request Cause
Select Bit ⁽⁵⁾
0 : CAN0/1 error
1 : key input
RW
-
Nothing is assigned. When write, set to "0".
(b7)
When read, its content is indeterminate.
-
NOTES:
1.When setting this bit to "1" (both edges), make sure the POL bit in the INT6IC to INT8IC registers are
set to "0" (falling edge). The INT6IC to INT8IC registers are only in the 128-pin version.
In the 100-pin version, make sure the INT6 to INT8 interrupt polarity switching bitis set to "0" (falling edge).
2.Timer A2 and INT7 share the vector and interrupt control register.
When using the timer A2 interrupt, set the IFSR20 bit to "0" (Timer A2). When using INT7 interrupt,
set the IFSR20 bit to "1" (INT7).
The INT7 interrupt is only in the 128-pin version. In the 100-pin version, set the IFSR20 bit to "0" (Timer A2).
3.Timer A3 and INT6 share the vector and interrupt control register.
When using the timer A3 interrupt, set the IFSR21 bit to "0" (Timer A3). When using INT6 interrupt,
set the IFSR21 bit to "1" (INT6).
The INT6 interrupt is only in the 128-pin version. In the 100-pin version, set the IFSR21 bit to "0" (Timer A3).
4.Timer B1 and INT8 share the vector and interrupt control register.
When using the timer B1 interrupt, set the IFSR22 bit to "0" (Timer B1). When using INT8 interrupt,
set the IFSR22 bit to "1" (INT8).
The INT8 interrupt is only in the 128-pin version. In the 100-pin version, set the IFSR22 bit to "0" (Timer B1).
5.When the PCLK6 bit in the PCLKR register = 1, CAN0/1 error and key input share the vector and
interrupt control register. When using the CAN0/1 error interrupt, set the IFSR26 bit to "0" (CAN0/1
error). When using the key input interrupt, set the IFSR26 bit to "1" (key input).
6.When using the INT6 to INT8 interrupts, set these bits after settig the PU37 bit in the PUR3 register to "1".
Figure 10.13 IFSR2 Register
Rev.2.00 Nov 28, 2005 page 97 of 378
REJ09B0124-0200