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M16C6NK Datasheet, PDF (189/404 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES
Under development
This document is under development and its contents are subject to change.
M16C/6N Group (M16C/6NK, M16C/6NM)
15. Serial Interface
• Example of Receive Timing when Transfer Data is 8-bit Long (parity disabled, one stop bit)
UiBRG count
source
RE bit in
"1"
UiC1 register "0"
RXDi
Start bit
Stop bit
D0
D1 D7
Sampled "L"
Receive data taken in
Transfer clock
RI bit in
UiC1 register
RTSi
IR bit in
SiRIC register
Reception triggered when transfer clock
"1" is generated by falling edge of start bit
"0"
"H"
"L"
"1"
"0"
Transferred from UARTi receive
register to UiRB register
i = 0 to 2
Set to "0" by an interrupt request acknowledgement or by program
The above timing diagram applies to the case where the register bits are set as follows:
PRYE bit in UiMR register = 0 (parity disabled)
STPS bit in UiMR register = 0 (1 stop bit)
CRD bit in UiC0 register = 0 (CTSi/RTSi enabled) and CRS bit = 1 (RTSi selected)
Figure 15.18 Receive Operation
15.1.2.1 Bit Rates
In UART mode, the frequency set by the UiBRG register (i = 0 to 2) divided by 16 become the bit rates.
Table 15.9 lists example of bit rates and settings.
Table 15.9 Example of Bit Rates and Settings
Bit-rate
(bps)
Peripheral Function Clock: 16MHz Peripheral Function Clock: 20MHz Peripheral Function Clock: 24MHz (1)
Count Source Set Value of Actual Time Set Value of Actual Time Set Value of Actual Time
of BRG
BRG: n
(bps)
BRG: n
(bps)
BRG: n
(bps)
1200
f8
103 (67h)
1202 129 (81h)
1202 155 (9Bh)
1202
2400
f8
51 (33h)
2404
64 (40h)
2404
77 (4Dh)
2404
4800
f8
25 (19h)
4808
32 (20h)
4735
38 (26h)
4808
9600
f1
103 (67h)
9615 129 (81h)
9615 155 (9Bh)
9615
14400
f1
68 (44h) 14493
86 (56h) 14368 103 (67h) 14423
19200
f1
51 (33h) 19231
64 (40h) 19231
77 (4Dh) 19231
28800
f1
34 (22h) 28571
42 (2Ah) 29070
51 (33h) 28846
31250
f1
31 (1Fh) 31250
39 (27h) 31250
47 (2Fh) 31250
38400
f1
25 (19h) 38462
32 (20h) 37879
38 (26h) 38462
51200
f1
19 (13h) 50000
23 (17h) 52083
28 (1Ch) 51724
NOTE:
1. 24 MHz is available Normal-ver. only.
Rev.2.00 Nov 28, 2005 page 171 of 378
REJ09B0124-0200