M16C6NK Datasheet, PDF (379/404 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

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M16C/6N Group (M16C/6NK, M16C/6NM)
23. Usage Precaution
If the CPU reads the ADi register at the same time the conversion result is stored in the ADi register after
completion of A/D conversion, an incorrect value may be stored in the ADi register. This problem occurs
when a divide-by-n clock derived from the main clock or a sub clock is selected for CPU clock.
• When operating in one-shot or single-sweep mode
Check to see that A/D conversion is completed before reading the target ADi register. (Check the IR bit in
the ADIC register to see if A/D conversion is completed.)
• When operating in repeat mode or repeat sweep mode 0 or 1
Use the main clock for CPU clock directly without dividing it.
If A/D conversion is forcibly terminated while in progress by setting the ADST bit in the ADCON0 register to
“0” (A/D conversion halted), the conversion result of the A/D converter is indeterminate. The contents of ADi
registers irrelevant to A/D conversion may also become indeterminate. If while A/D conversion is underway
the ADST bit is set to “0” in a program, ignore the values of all ADi registers.
When setting the ADST bit to “0” in single sweep mode during A/D conversion and A/D conversion is
aborted, disable the interrupt before setting the ADST bit to “0”.
The applied intermediate potential may cause more increase in power consumption than other analog input pins
______ ______
(AN0 to AN3, AN0_0 to AN0_7 and AN2_0 to AN2_7), since the AN4 to AN7 are used with the KI0 to KI3.
Rev.2.00 Nov 28, 2005 page 361 of 378
REJ09B0124-0200