M16C6NK Datasheet, PDF (301/404 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

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M16C/6N Group (M16C/6NK, M16C/6NM)
21. Flash Memory Version
Table 21.7 Pin Functions for Standard Serial I/O Mode
Pin
Name
I/O
Description
VCC1, VCC2, VSS Power supply
Apply the Flash Program, Erase Voltage to VCC1 pin and VCC2 to
input
VCC2 pin. The VCC apply condition is that VCC2 = VCC1.
Apply 0 V to VSS pin.
CNVSS
_____________
RESET
CNVSS
Reset input
I Connect to VCC1 pin.
____________
I Reset input pin. While RESET pin is "L" level, input 20 cycles or
longer clock to XIN pin.
XIN
XOUT
Clock input
Clock output
I Connect a ceramic resonator or crystal oscillator between XIN and
O XOUT pins. To input an externally generated clock, input it to XIN
pin and open XOUT pin.
BYTE
AVCC, AVSS
BYTE
Analog power
I Connect this pin to VCC1 or VSS.
Connect AVCC to VCC1 and AVSS to VSS, respectively.
supply input
VREF
Reference
voltage input
I Enter the reference voltage for A/D and D/A converters from this
pin.
P0_0 to P0_7
P1_0 to P1_7
P2_0 to P2_7
P3_0 to P3_7
P4_0 to P4_7
P5_0
P5_1 to P5_4,
Input port P0
Input port P1
Input port P2
Input port P3
Input port P4
_____
CE input
Input port P5
I Input “H” or “L” level signal or open.
I Input “H” or “L” level signal or open.
I Input “H” or “L” level signal or open.
I Input “H” or “L” level signal or open.
I Input “H” or “L” level signal or open.
I Input “H” level signal.
I Input “H” or “L” level signal or open.
P5_6, P5_7
P5_5
P6_0 to P6_3
_________
P6_4/RTS1
________
EPM input
Input port P6
BUSY output
I Input “L” level signal.
I Input “H” or “L” level signal or open.
O Standard serial I/O mode 1: BUSY signal output pin
Standard serial I/O mode 2: Monitors the boot program operation
check signal output pin.
P6_5/CLK1
SCLK input
I Standard serial I/O mode 1: Serial clock input pin.
Standard serial I/O mode 2: Input “L”.
P6_6/RXD1
P6_7/TXD1
P7_0 to P7_7
P8_0 to P8_3,
RXD input
TXD output
Input port P7
Input port P8
I Serial data input pin
O Serial data output pin ⁽¹⁾
I Input “H” or “L” level signal or open.
I Input “H” or “L” level signal or open.
P8_6, P8_7
P8_4
_______
P8_5/NMI
P8_4 input
________
NMI input
P9_0 to P9_4, P9_7 Input port P9
P9_5/CRX0
CRX input
P9_6/CTX0
CTX output
P10_0 to P10_7
P11_0 to P11_7 ⁽³⁾
P12_0 to P12_7 ⁽³⁾
P13_0 to P13_7 ⁽³⁾
P14_0, P14_1 ⁽³⁾
Input port P10
Input port P11
Input port P12
Input port P13
Input port P14
I Input “L” level signal. ⁽²⁾
I Connect this pin to VCC1.
I Input “H” or “L” level signal or open.
I Input “H” or “L” level signal or connect to a CAN transceiver.
O Input “H” level signal, open or connect to a CAN transceiver.
I Input “H” or “L” level signal or open.
I Input “H” or “L” level signal or open.
I Input “H” or “L” level signal or open.
I Input “H” or “L” level signal or open.
I Input “H” or “L” level signal or open.
NOTES:
____________
1. When using the standard serial I/O mode, It is necessary to input “H” to the TXD1(P6_7) pin while the RESET pin
____________
is “L”. Therefore, the internal pull-up is enabled for the TXD1(P6_7) pin while the RESET pin is “L”.
2. When using the standard serial I/O mode, the P0_0 to P0_7, P1_0 to P1_7 pins may become indeterminate
____________
while the P8_4 pin is “H” and the RESET pin is “L”. If this causes a problem, apply “L” to the P8_4 pin.
3. The pins P11 to P14 are only in the 128-pin version.
Rev.2.00 Nov 28, 2005 page 283 of 378
REJ09B0124-0200