M16C6NK Datasheet, PDF (191/404 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

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M16C/6N Group (M16C/6NK, M16C/6NM)
15. Serial Interface
15.1.2.4 Serial Data Logic Switching Function
The data written to the UiTB register has its logic reversed before being transmitted. Similarly, the
received data has its logic reversed when read from the UiRB register. Figure 15.20 shows serial data logic.
(1) When the UiLCH bit in the UiC1 register = 0 (no reverse)
Transfer clock ^"H"
"L"
TXDi ^"H"
(no reverse) _"L"
ST D0 D1 D2 D3 D4 D5 D6 D7 P SP
(2) When the UiLCH bit = 1 (reverse)
"H"
Transfer clock
"L"
TXDi ^"H"
(reverse) "L"
ST D0 D1 D2 D3 D4 D5 D6 D7 P SP
i = 0 to 2
ST: Start bit
P: Parity bit
SP: Stop bit
NOTE:
1. This applies to the case where the register bit are set as follows:
CKPOL bit in UiC0 register = 0 (transmit data output at the falling edge of the transfer clock)
UFORM bit in UiC0 register = 0 (LSB first)
STPS bit in UiMR register = 0 (1 stop bit)
PRYE bit in UiMR register = 1 (parity enabled)
Figure 15.20 Serial Data Logic Switching
15.1.2.5 TXD and RXD I/O Polarity Inverse Function
This function inverses the polarities of the TXDi pin output and RXDi pin input. The logic levels of all input/output
data (including the start, stop and parity bits) are inversed. Figure 15.21 shows the TXD and RXD input/output
polarity inverse.
(1) When the IOPOL bit in the UiMR register = 0 (no reverse)
Transfer clock ^"H"
"L"
TXDi "H"
(no reverse) "L"
ST D0 D1 D2 D3 D4 D5 D6 D7 P SP
RXDi "H"
(no reverse) "L"
ST D0 D1 D2 D3 D4 D5 D6 D7 P SP
(2) When the IOPOL bit = 1 (reverse)
Transfer clock ^"H"
"L"
TXDi "H"
(reverse) "L"
ST D0 D1 D2 D3 D4 D5 D6 D7 P SP
RXDi ^"H"
(reverse) ^"L"
ST D0 D1 D2 D3 D4 D5 D6 D7 P SP
i = 0 to 2
ST: Start bit
P: Parity bit
SP: Stop bit
NOTE:
1. This applies to the case where the register bits are set as follows:
UFORM bit in UiC0 register = 0 (LSB first)
STPS bit in UiMR register = 0 (1 stop bit)
PRYE bit in UiMR register = 1 (parity enabled)
Figure 15.21 TXD and RXD I/O Polarity Inverse
Rev.2.00 Nov 28, 2005 page 173 of 378
REJ09B0124-0200