M16C6NK Datasheet, PDF (132/404 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

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M16C/6N Group (M16C/6NK, M16C/6NM)
13. Timers
Main clock
PLL clock
f1
On-chip
oscillator clock
1/2 ^f2
1/8
PCLK0 = 0
PCLK0 = 1
1/4
f1 or f2
f8
f32
Clock prescaler
XCIN
1/32
Set the CPSR bit in the
CPSRF register to "1"
(prescaler reset)
Reset
fC32
TB0IN
TB1IN
TB2IN
TB3IN
TB4IN
TB5IN
f1 or f2 f8 f32 fC32
Timer B2 overflow or underflow (to a count source of theTimer A)
TCK1 to TCK0
00
TMOD1 to TMOD0
01
10
11
1
Noise
00: Timer mode
10: Pulse width / period measuring mode
Timer B0
Timer B0 interrupt
filter
0
TCK1
01: Event counter mode
00 ^{TCK1 to TCK0}
01
10
11
1
Noise
TMOD1 to TMOD0
00: Timer mode
10: Pulse width / period measuring mode
Timer B1
Timer B1 interrupt
filter
0
TCK1
01: Event counter mode
00 ^{TCK1 to TCK0}
01
10
11
Noise
filter
1
0
TCK1
TMOD1 to TMOD0
00: Timer mode
10: Pulse width / period measuring mode
Timer B2
01: Event counter mode
Timer B2 interrupt
00 ^{TCK1 to TCK0}
01
10
11
Noise
filter
1
0
TCK1
TMOD1 to TMOD0
00: Timer mode
10: Pulse width / period measuring mode
Timer B3
01: Event counter mode
Timer B3 interrupt
TCK1 to TCK0
00
01
10
11
Noise
filter
1
0
TCK1
TMOD1 to TMOD0
00: Timer mode
10: Pulse width / period measuring mode
Timer B4
01: Event counter mode
Timer B4 interrupt
00 ^{TCK1 to TCK0}
01
10
11
1
Noise
TMOD1 to TMOD0
00: Timer mode
10: Pulse width / period measuring mode
Timer B5
Timer B5 interrupt
filter
0
TCK1
01: Event counter mode
PCLK0: Bit in PCLKR register
TCK1 to TCK0, TMOD1 to TMOD0: Bits in TBiMR register (i = 0 to 5)
NOTE:
1. Be aware that TB5IN shares the pin with RXD2, SCL2 and TA0IN.
Figure 13.2 Timer B Configuration
Rev.2.00 Nov 28, 2005 page 114 of 378
REJ09B0124-0200