M16C6NK Datasheet, PDF (239/404 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

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M16C/6N Group (M16C/6NK, M16C/6NM)
18. CRC Calculation
18. CRC Calculation
The Cyclic Redundancy Check (CRC) operation detects an error in data blocks. The microcomputer uses a
generator polynomial of CRC-CCITT (X¹⁶ + X¹² + X⁵ + 1) to generate CRC code.
The CRC code consists of 16 bits which are generated for each data block in given length, separated in 8-bit
unit. After the initial value is set in the CRCD register, the CRC code is set in that register each time one byte
of data is written to the CRCIN register. CRC code generation for one-byte data is finished in two cycles.
Figure 18.1 shows the block diagram of the CRC circuit. Figure 18.2 shows the CRC-related registers. Figure
18.3 shows the calculation example using the CRC operation.
Data bus high-order
Data bus low-order
Low-order 8 bits
CRCD register
High-order 8 bits
CRC code generating circuit
x¹⁶ +x¹² +x⁵ +1
CRCIN register
Figure 18.1 CRC Circuit Block Diagram
CRC Data Register
(b15)
b7
(b8)
b0 b7
b0
Symbol
Address
After Reset
CRCD
03BDh to 03BCh Indeterminate
Function
Setting Range RW
When data is written to the CRCIN register after setting
the initial value in the CRCD register, the CRC code can 0000h to FFFFh _RW
be read out from the CRCD register.
CRC Input Register
b7
b0
Data input
Symbol
CRCIN
Function
Address
03BEh
After Reset
Indeterminate
Setting Range RW
00h to FFh
RW
Figure 18.2 CRCD Register and CRCIN Register
Rev.2.00 Nov 28, 2005 page 221 of 378
REJ09B0124-0200