M16C6NK Datasheet, PDF (108/404 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

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M16C/6N Group (M16C/6NK, M16C/6NM)
10. Interrupt
10.5.5 Interrupt Response Time
Figure 10.6 shows the interrupt response time. The interrupt response or interrupt acknowledge time
denotes a time from when an interrupt request is generated till when the first instruction in the interrupt
routine is executed. Specifically, it consists of a time from when an interrupt request is generated till when
the instruction then executing is completed ((a) on Figure 10.6) and a time during which the interrupt
sequence is executed ((b) on Figure 10.6).
Interrupt request generated Interrupt request acknowledged
Instruction
(a)
Interrupt sequence
(b)
Time
Instruction in
interrupt routine
Interrupt response time
(a) A time from when an interrupt request is generated till when the instruction then
executing is completed. The length of this time varies with the instruction being
executed. The DIVX instruction requires the longest time, which is equal to 30 cycles
(without wait state, the divisor being a register).
(b) A time during which the interrupt sequence is executed. For details, see the table
below. Note, however, that the values in this table must be increased 2 cycles for the
DBC interrupt and 1 cycle for the address match and single-step interrupts.
Interrupt Vector Address
Even
Odd
SP Value
Even
Odd
Even
Odd
16-bit Bus, without Wait
18 cycles
19 cycles
19 cycles
20 cycles
8-bit Bus, without Wait
20 cycles
Figure 10.6 Interrupt response time
10.5.6 Variation of IPL when Interrupt Request is Accepted
When a maskable interrupt request is accepted, the interrupt priority level of the accepted interrupt is set
in the IPL.
When a software interrupt or special interrupt request is accepted, one of the interrupt priority levels listed
in Table 10.5 is set in the IPL. Table 10.5 shows the IPL values of software and special interrupts when
they are accepted.
Table 10.5 IPL Level that is Set to IPL When A Software or Special Interrupt is Accepted
Interrupt Sources
_______
Oscillation Stop and Re-oscillation Detection, Watchdog Timer, NMI
_________
Software, Address Match, DBC, Single-Step
Value that is Set to IPL
7
Not changed
Rev.2.00 Nov 28, 2005 page 90 of 378
REJ09B0124-0200