M16C6NK Datasheet, PDF (81/404 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

Under development
This document is under development and its contents are subject to change.
M16C/6N Group (M16C/6NK, M16C/6NM)
8. Clock Generating Circuit
PLL Control Register 0 ⁽¹⁾
b7 b6 b5 b4 b3 b2 b1 b0
0 01
Symbol
PLC0
Address
001Ch
After Reset
0001X010b
Bit Symbol
Bit Name
Function
RW
b2 b1 b0
PLC00
0 0 0 : Do not set a value
RW
0 0 1 : Multiply by 2
0 1 0 : Multiply by 4
PLL Multiplying Factor
PLC01 _{Select Bit (2)}
0 1 1 : Multiply by 6 ⁽⁴⁾
100:
RW
PLC02
101:
110:
Do not set a value
RW
111:
-
Nothing is assigned. When write, set to "0".
(b3) _{When read, its content is indeterminate.}
-
-
(b4)
Reserved Bit
Set to "1"
RW
-
(b6-b5) ^{Reserved Bit}
Set to "0"
RW
PLC07 Operation Enable Bit ⁽³⁾
0 : PLL Off
1 : PLL On
RW
NOTES:
1. Write to this register after setting the PRC0 bit in the PRCR register to "1" (write enable).
2. This bit can only be modified when the PLC07 bit = 0 (PLL turned off). The value once written to this bit
cannot be modified.
3. Before setting this bit to "1", set the CM07 bit in the CM0 register to "0" (main clock), set the CM17 to
CM16 bits in the CM1 register to "00b" (main clock undivided mode), and set the CM06 bit in the CM0
register to "0" (CM16 and CM17 bits enable).
4. Multiply by 6 is available Normal-ver. only.
Figure 8.8 PLC0 Register
Rev.2.00 Nov 28, 2005 page 63 of 378
REJ09B0124-0200